Bonsoir,
Voila, j'ai un problème avec je ne sais pas qu'elle maillon de ma chaîne de programmation...
J'ai fait un programme, XC8 arrive bien à compiler... Quand je lance la programmation avec l'ICD3, les leds de ce dernier clignote tout comme il faut... Mais sur la carte, rien ne se passe, pas même le moindre scintillement de led qui indiquerait un Reset, et l'ancien programme, est tjs présent..
Je ne comprend pas pourquoi cela ne veut pas marcher... La carte à déja été programmer plusieurs fois, sans aucun soucis (avec MPLab8 et CCS)
Dans mon précédent poste, il manquait plein de truc, il était tard =)
Voyez vous un truc manquant ? Je ne voit plus quoi.. J'ai lu la notice du compilateur dans tout les sens =(
Mon main:
Code:#include <xc.h> /* XC8 General Include File */ #include <stdint.h> /* For uint8_t definition */ #include <stdbool.h> /* For true/false definition */ #include "system.h" /* System funct/params, like osc/peripheral config */ #include "user.h" /* User funct/params, such as InitApp */ int count; void interrupt isr(void) //Page 190 ou 90 { if(TMR1IF=1) { TMR1H = 0xD8; TMR1L = 0xF0; TMR1IF = 0; count++; if(count==500) { L_LED_CPU = !P_LED_CPU; } } } void InitTimer1(void) { INTCON = 0xC0; T1CON = 0x01; PIE1 = 0x01; TMR1H = 0xD8; TMR1L = 0xF0; TMR1IF = 0; } void main(void) { InitApp(); InitTimer1(); L_LED_CPU = ON; while(1) { } }
Mon system.h :
Code:#include <xc.h> #pragma config OSC = HSPLL // Oscillator Selection bits (HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)) #pragma config OSCS = OFF // Oscillator System Clock Switch Enable bit (Oscillator system clock switch option is disabled (main oscillator is source)) // CONFIG2L #pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled) #pragma config BOR = ON // Brown-out Reset Enable bit (Brown-out Reset enabled) #pragma config BORV = 25 // Brown-out Reset Voltage bits (VBOR set to 2.5V) // CONFIG2H #pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit)) #pragma config WDTPS = 128 // Watchdog Timer Postscale Select bits (1:128) // CONFIG4L #pragma config STVR = ON // Stack Full/Underflow Reset Enable bit (Stack Full/Underflow will cause Reset) #pragma config LVP = OFF // Low-Voltage ICSP Enable bit (Low-Voltage ICSP disabled) // CONFIG5L #pragma config CP0 = OFF // Code Protection bit (Block 0 (000200-001FFFh) not code protected) #pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) not code protected) #pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) not code protected) #pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) not code protected) // CONFIG5H #pragma config CPB = OFF // Boot Block Code Protection bit (Boot Block (000000-0001FFh) not code protected) #pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code protected) // CONFIG6L #pragma config WRT0 = OFF // Write Protection bit (Block 0 (000200-001FFFh) not write protected) #pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh) not write protected) #pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh) not write protected) #pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh) not write protected) // CONFIG6H #pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write protected) #pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0001FFh) not write protected) #pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write protected) // CONFIG7L #pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000200-001FFFh) not protected from Table Reads executed in other blocks) #pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from Table Reads executed in other blocks) #pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from Table Reads executed in other blocks) #pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from Table Reads executed in other blocks) // CONFIG7H #pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0001FFh) not protected from Table Reads executed in other blocks)
Mon user.h :
Code:#ifndef USER_H #define USER_H #include <xc.h> #include <stdint.h> /* For uint8_t definition */ #include <stdbool.h> /* For true/false definition */ #define D_LED_CPU TRISBbits.TRISB0 #define P_LED_CPU PORTBbits.RB0 #define L_LED_CPU LATBbits.LATB0 #define INPUT 1 #define OUTPUT 0 #define ON 1 #define OFF 0 void InitApp(void); /* I/O and Peripheral Initialization */ #endif
Mon user.c :
Code:#include <xc.h> /* XC8 General Include File */ #include <stdint.h> /* For uint8_t definition */ #include <stdbool.h> /* For true/false definition */ #include "user.h" void InitApp(void) { D_LED_CPU = OUTPUT; }
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