Pic18f25k22 configuration oscillateur externe

[invite56cfb887]

Bonjour à tous,

Pour le développement d'un projet de gestion de chauffage personnel, j'utilise un Pic 18F25K22.
J'ai fait un print "ProcSchematic.png" et pour le processeur j'ai décidé d'utiliser un oscillateur externe 16MHz car se Pic peut fonctionner jusqu’à 64MHz "Pic18F25K22_64MHz.png".
Suivant le datasheet j'aimerais suivre ce chemin pour le clock --> "Pic18F25K22_ClockSchematic.png"

Malgré mes efforts je n'arrive pas à le faire fonctionner à cette fréquence.
Pour mesurer la vitesse je fait varier une sortie a "1" et a "0" dans le "main" suivant ce code:

//#include <stdio.h>
//#include <stdlib.h>

#include "pragma.h"

#include "def.h"
#include "iDio.h"
#include "iCpu.h"
#include "iRti.h"


int main(void)
{
    UInt8 blink = 0;

    //Initialisation
    //--------------------------------------------------------------------------
    iCpu_Config();
    //iRti_Config();

    //Starting
    //--------------------------------------------------------------------------
    //iRti_start();

    //Running
    //--------------------------------------------------------------------------
    while(1)
    {
        blink = (~blink) & 0x01;
        PORTCbits.RC1 = blink;
    }

    return 0;
}

Puis je mesure à l'oscilloscope la fréquence et j'obtiens ~761KHz.....

Voici mon code de configuration (pragma.h):

#ifndef CONFIGURATION_H
#define	CONFIGURATION_H

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

// CONFIG1H
#pragma config FOSC = HSMP      // Oscillator Selection bits (HS oscillator (medium power 4-16 MHz))
#pragma config PLLCFG = ON      // 4X PLL Enable (Oscillator multiplied by 4)
#pragma config PRICLKEN = ON    // Primary clock enable bit (Primary clock enabled)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRTEN = OFF     // Power-up Timer Enable bit (Power up timer disabled)
#pragma config BOREN = OFF      // Brown-out Reset Enable bits (Brown-out Reset disabled in hardware and software)
#pragma config BORV = 190       // Brown Out Reset Voltage bits (VBOR set to 1.90 V nominal)

// CONFIG2H
#pragma config WDTEN = OFF      // Watchdog Timer Enable bits (Watch dog timer is always disabled. SWDTEN has no effect.)
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC1  // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF     // PORTB A/D Enable bit (PORTB<5:0> pins are configured as digital I/O on Reset)
#pragma config CCP3MX = PORTB5  // P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)
#pragma config HFOFST = ON      // HFINTOSC Fast Start-up (HFINTOSC output and ready status are not delayed by the oscillator stable status)
#pragma config T3CMX = PORTC0   // Timer3 Clock input mux bit (T3CKI is on RC0)
#pragma config P2BMX = PORTB5   // ECCP2 B output mux bit (P2B is on RB5)
#pragma config MCLRE = EXTMCLR  // MCLR Pin Enable bit (MCLR pin enabled, RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection Block 0 (Block 0 (000800-001FFFh) not code-protected)
#pragma config CP1 = OFF        // Code Protection Block 1 (Block 1 (002000-003FFFh) not code-protected)
#pragma config CP2 = OFF        // Code Protection Block 2 (Block 2 (004000-005FFFh) not code-protected)
#pragma config CP3 = OFF        // Code Protection Block 3 (Block 3 (006000-007FFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF       // Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)

#endif	/* CONFIGURATION_H */

Et pour finir le code de configuration de la CPU:

void iCpu_Config(void)
{
    //Interrupt Configuration
    //--------------------------------------------------------------------------
    //Interrupt Control
    INTCONbits.GIE = 1;     //Global Inerrupt = enable
    INTCONbits.PEIE = 1;    //Periferal Interrupt = enable
    RCONbits.IPEN = 1;      //Interrupt priority enable

    //Oscillator Configuration
    //--------------------------------------------------------------------------
    //Interupt priority
    IPR2bits.OSCFIP = 1;    //Oscillator fail interupt priority = hight

    //Configuration oscillator
    OSCCONbits.OSTS = 1;    //Defined clock by
    OSCCONbits.SCS = 0;     //Active external oscillator = enable

    //Configuration oscillator 2
    OSCCON2bits.PLLRDY = 1; //4x PLL = enable
    OSCCON2bits.PRISD = 1;  //Primary oscillator drive = enable

    //Oscillator tuning
    OSCTUNEbits.PLLEN = 1;  //Pll activation = enable

    //Periferical interupt 2
    PIE2bits.OSCFIE = 1;    //Oscillator fail interupt = enable
}

Est-ce que quel qu'un aurait déjà rencontré ce problème et connaîtrait la solution ?
Merci aux personnes qui prennent le temps de se pencher sur mon problème.