Problème de simulation sur Modelsim

[MedYak]

Bonjour/Bonsoir;

J'essaye de concevoir un système qui permet de calculer le cos et le sin d'un angle donnée en langage VHDL. Cependant, en simulation des résultats pour l'angle -120 le simulateur affiche 2 valeurs pour le sin et 2 pour le cos. j'ai bien vérifié le testbench j'ai rien trouvé d'anomalie.


Est-qu'il y a parmi vous qui maîtrise le langage VHDL et le simulateur Modelsim et qui peut m'aider en m'indiquant le problème dans mon code.

J'ai pas arrivé à ajouter directement les fichiers dans la discussion, donc vous les trouverez sur [URL="http://www.mediafire.com/file/lmspk6x378phl3g/file"]

Je vous remercie.
-----

[jiherve]

bonsoir,
il y a moi au moins mais il faudra attendre la validation de la pièce jointe car j'évite les sites externes.
Mais pour faire avancer un peu quel algo : un CORDIC?
Nota : du code peut être inclut en allant en mode avancé balise code (#)
la piece jointe est validée mais totalement inutile!!!

JR

[MedYak]

Oui c'est Cordic. Les fichiers sont sur mediafire j'arrive pas à les télécharger ici je pense qu'il s'agit d'un problème dans le forum.

[jiherve]

Re
jeter un oeuil là :https://opencores.org/projects?expan...thmetic%20core
inutile de réinventer la poudre.
Il suffit de faire un ctrl C sur le code et un ctlr V entre les balises code.
JR

[A voir en vidéo sur Futura]

[MedYak]

voici le code VHDL, le testbench est en dessous :

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity cordic is
port(clk, start: in std_logic; -- clock signal and start signal
angle : in std_logic_vector(15 downto 0); --input angle
-- in angle vector MSB is sign bit and remaining bits are the angle value
cosine, sine : out std_logic_vector( 16 downto 0); -- outputs cos and sin values
-- in sine and cosine vector output the MSB in cos and sin vector is sign bit and remaining are values which are in fraction
done2 : out std_logic); --INDICATES COMPLETION AND GOT CORRECT VALUES
end cordic; -- END OF THE ENTITY NAME
architecture project of cordic is --ARCHITECTURE NAME IS PROJECT
signal load, shift, incr,angpos, angneg, posi, c8, negativesign, done1,flag: std_logic:='0';
-- REQUIRED SIGNALS
signal state, nextstate : integer range 0 to 5; -- STATE AND NEXT STATE
signal x,y,dx,dy : std_logic_vector( 15 downto 0); -- AFTER ALGORITHM COMPLETES X HOLDS COS(A), Y HOLDS SIN(A)
-- dx and dy which holds x/(2^i), y/(2^i) respectively
signal a: std_logic_vector(16 downto 0); -- a which holds angle mentioned in question
signal da: std_logic_vector(15 downto 0); -- which holds arctan(2^-i) values in this upper 8 bits whole number part and lower 8 bits fractional part
signal counter: integer range 0 to 8; -- which counts number of cycles.
signal t,cc:integer ;
type atang is array (0 to 8) of std_logic_vector(15 downto 0); -- look up table which holds arctan(2^-i) where i ranging from 0 to 8
---- upper 8 bits whole number part, lower 8 bits fractional part
constant arctang :atang :=("0010110100000000", -- 45 degrees
"0001101010010000", -- 26.6 degrees
"0000111000001001", -- 14.03 degrees
"0000011100100000", -- 7.12 degrees
"0000001110010011", -- 3.57 degrees
"0000000111001010", -- 1.78 degrees
"0000000011100101", -- 0.89 degrees
"0000000001110010", -- 0.44 degrees
"0000000000111001"); -- 0.22 degrees
constant mach : std_logic_vector(7 downto 0):="00000000"; --It is used for right shift operation
begin
c8<='1' when counter=8 else '0'; -- After counter reaches 8 opeartion over and we get cos and sin values
posi<='0' when (a(16)='1') else '1'; -- it is for if angle is positive or negative based on this
-- it simulates angpos and angneg
process(state,start,c8,posi)
begin
shift<='0';load<='0'; incr<='0'; angpos<='0'; angneg<='0'; done1<='0';done2<='0';
case state is -- actual process going in state diagram how the operation works when it changes from state to nextstate
when 0 => if(start='1') then nextstate<=5; load<='1';
else nextstate <=0; end if;
when 1=> if(c8='1') then nextstate<=4; done1<='1'; -- if c8='1' end of operation
else nextstate<=2; shift<='1'; end if;
when 2=> if(posi='1') then nextstate <=3; angpos<='1'; -- if angle is positive it do angpos
else nextstate <=3; angneg<='1'; end if; -- if angle is negative it do angneg
when 3=> nextstate<=1; incr<='1'; --increment the counter
when 4=> if(start='1') then nextstate<=0; done2<='1'; --
else nextstate<=0; done2<='1'; end if;
when 5=>if(start='1')then nextstate<=1;load<='1';
else nextstate<=5 ;end if;
end case;
end process; --end of second process
process(clk)
variable t1:std_logic_vector(8 downto 0):=(others=>'0');
variable in_angle:std_logic_vector(7 downto 0):=(others=>'0');
begin
if(clk='1' and clk'event) then
state<=nextstate; -- updating state
if(load='1') then
dx<="0000000000000000";
dy<="0000000000000000";
x<="1001101101110001"; -- x is a 16-bit register representing fractional values. It should be intialized to .607
y<="0000000000000000"; -- y is a 16 bit register representing fractional values. It should be intialized to .607
t1:=angle(8 downto 0); -- here we transforming the angles in first quadrant and calculating cos and sign values after performing according to quadrants the angles lie sign is assigned
if(angle(8)='1') then -- it is sign bit in angle that is MSB in angle input
t1:=not(t1)+'1';
else
t1:=t1;
end if;
in_angle:=t1(7 downto 0);
cc<=conv_integer(t1(7 downto 0));
if(cc>90) then
in_angle(7 downto 0):="10110100"-in_angle(7 downto 0);
a<='0' & in_angle( 7 downto 0) & "00000000";
else
a<='0' & in_angle( 7 downto 0) & "00000000";
end if;
negativesign<=angle(8);
counter<=0;
end if;
if(shift='1') then
if( counter=0) then
dx<=x(15 downto 0); --when i=0 x is assigned to dx value
dy<=y(15 downto 0); --when i=0 y is assigned to dy value
da<=arctang(0);
else
dx<=mach(7 downto (8-counter)) & x(15 downto (counter)); --when i goes on upto 8 increasing right shift operation takes place in dx
dy<=mach(7 downto (8-counter)) & y(15 downto (counter)); --when i goes on upto 8 increasing right shift operation takes place in dy
da<=arctang(counter);-- i goes on incrementing the precalculated values are also assigned according to each cycle
end if;
end if;
if(incr='1') then
counter<=counter+1; -- it increments the counter
end if;
if(angpos='1') then -- it performs when angle is positive
x<= x - dy;
y<= y + dx;
a<= a - da;
end if;
if(angneg='1') then -- it performs when angle is negative
x<= x + dy;
y<= y - dx;
a<= a + da;
end if;
t<=conv_integer(t1(7 downto 0));
if( done1 ='1') then
if(angle(8)='1')then -- in this sign is assigned according to the angle lies in quadrant the sign bit in cos and sine value is assigned sin
if(t>=0 and t <= 90) then
cosine<='0' & x;
sine<= '1' & y;
elsif(t>90 and t <= 180) then
cosine<='1' & x;
sine<= '1' & y;
end if;
elsif(angle(8)='0')then
if(t>=0 and t <= 90) then
cosine<='0' & x;
sine<= '0' & y;
elsif(t>90 and t <= 180) then
flag<='1';
cosine<='1' & x;
sine<= '0' & y;
end if;
end if;
end if;
end if;
end process; -- end of second process
end project; -- end of architecture name

Testbench :

LIBRARY ieee  ; 
LIBRARY std  ; 
USE ieee.std_logic_1164.all  ; 
USE ieee.std_logic_arith.all  ; 
USE ieee.std_logic_textio.all  ; 
USE ieee.STD_LOGIC_UNSIGNED.all  ; 
USE ieee.std_logic_unsigned.all  ; 
use ieee.numeric_std.all;
use ieee.math_real.all;
USE std.textio.all  ; 
ENTITY tb  IS 
END ; 
 
ARCHITECTURE tb_arch OF tb IS
  signal checker : integer ;
  SIGNAL done2   :  STD_LOGIC  ; 
  SIGNAL cosine   :  std_logic_vector (16 downto 0) :=(others => '0')  ; 
  SIGNAL start   :  STD_LOGIC  ; 
  SIGNAL clk   :  STD_LOGIC  :='0'; 
  SIGNAL sine   :  std_logic_vector (16 downto 0):=(others => '0')  ; 
  SIGNAL angle   :  std_logic_vector (15 downto 0);--:=("0000000000000000");
  COMPONENT cordic  
port(clk, start: in std_logic; -- clock signal and start signal
angle : in std_logic_vector(15 downto 0); --input angle
-- in angle vector MSB is sign bit and remaining bits are the angle value
cosine, sine : out std_logic_vector( 16 downto 0); -- outputs cos and sin values
-- in sine and cosine vector output the MSB in cos and sin vector is sign bit and remaining are values which are in fraction
done2 : out std_logic); --INDICATES COMPLETION AND GOT CORRECT VALUES
       
  END COMPONENT ; 
BEGIN
  DUT  : cordic  
    PORT MAP ( 
      done2   => done2  ,
      cosine   => cosine  ,
      start   => start  ,
      clk   => clk  ,
      sine   => sine  ,
      angle   => angle   ) ; 

-- Generation d'horloge 
    start <= '1';
 

  --P_CLKGEN : process
  --begin
    clk <= not (clk) after 5 ns;
  --  wait for 2 ns;
    --clk <= '0';
    --wait for 2 ns;
  --end process;

  P_SIGGEN : process
  begin
  wait for 52 ns;
--angle <= "0000000001011010";
--wait for 100 ns;
--angle <= "0000000001111000";
--wait for 100 ns;
angle <= "1111111110001000";
wait for 52 ns;
--angle <= "1111111110110000";
--wait for 100 ns;
wait;

   
end process ;

END architecture;

[jiherve]

re
les indentations çà aide et c'est gratuit,mais je regarde.
avec des indentations correctes:

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity cordic is
  port(clk, start: in std_logic; -- clock signal and start signal
angle : in std_logic_vector(15 downto 0); --input angle
-- in angle vector MSB is sign bit and remaining bits are the angle value
cosine, sine : out std_logic_vector( 16 downto 0); -- outputs cos and sin values
-- in sine and cosine vector output the MSB in cos and sin vector is sign bit and remaining are values which are in fraction
done2 : out std_logic); --INDICATES COMPLETION AND GOT CORRECT VALUES
  end cordic; -- END OF THE ENTITY NAME
architecture project of cordic is --ARCHITECTURE NAME IS PROJECT
  signal load, shift, incr,angpos, angneg, posi, c8, negativesign, done1,flag: std_logic:='0';
-- REQUIRED SIGNALS
  signal state, nextstate : integer range 0 to 5; -- STATE AND NEXT STATE
  signal x,y,dx,dy : std_logic_vector( 15 downto 0); -- AFTER ALGORITHM COMPLETES X HOLDS COS(A), Y HOLDS SIN(A)
-- dx and dy which holds x/(2^i), y/(2^i) respectively
  signal a: std_logic_vector(16 downto 0); -- a which holds angle mentioned in question
  signal da: std_logic_vector(15 downto 0); -- which holds arctan(2^-i) values in this upper 8 bits whole number part and lower 8 bits fractional part
  signal counter: integer range 0 to 8; -- which counts number of cycles.
  signal t,cc:integer ;
  type atang is array (0 to 8) of std_logic_vector(15 downto 0); -- look up table which holds arctan(2^-i) where i ranging from 0 to 8
---- upper 8 bits whole number part, lower 8 bits fractional part
  constant arctang :atang :=("0010110100000000", -- 45 degrees
                             "0001101010010000", -- 26.6 degrees
                             "0000111000001001", -- 14.03 degrees
                             "0000011100100000", -- 7.12 degrees
                             "0000001110010011", -- 3.57 degrees
                             "0000000111001010", -- 1.78 degrees
                             "0000000011100101", -- 0.89 degrees
                             "0000000001110010", -- 0.44 degrees
                             "0000000000111001"); -- 0.22 degrees
  constant mach : std_logic_vector(7 downto 0):="00000000"; --It is used for right shift operation
begin
  c8  <='1' when counter=8 else '0'; -- After counter reaches 8 opeartion over and we get cos and sin values
  posi<='0' when (a(16)='1') else '1'; -- it is for if angle is positive or negative based on this
-- it simulates angpos and angneg
process(state,start,c8,posi)
  begin
    shift<='0';load<='0'; incr<='0'; angpos<='0'; angneg<='0'; done1<='0';done2<='0';
    case state is -- actual process going in state diagram how the operation works when it changes from state to nextstate
      when 0 => 
        if(start='1') then 
          nextstate<=5; load<='1';
        else 
          nextstate <=0; 
        end if;
      when 1=> 
        if(c8='1') then 
          nextstate<=4; done1<='1'; -- if c8='1' end of operation
        else 
          nextstate<=2; shift<='1'; 
        end if;
      when 2=> 
        if(posi='1') then 
          nextstate <=3; angpos<='1'; -- if angle is positive it do angpos
        else nextstate <=3; 
          angneg<='1'; 
        end if; -- if angle is negative it do angneg
      when 3=> 
        nextstate<=1; incr<='1'; --increment the counter
      when 4=> 
        if(start='1') then 
          nextstate<=0; done2<='1'; --
        else 
          nextstate<=0; done2<='1'; 
        end if;
      when 5=>
        if(start='1')then 
          nextstate<=1;load<='1';
        else 
          nextstate<=5 ;
        end if;
    end case;
  end process; --end of second process
process(clk)
  variable t1:std_logic_vector(8 downto 0):=(others=>'0');
  variable in_angle:std_logic_vector(7 downto 0):=(others=>'0');
  begin
    if(clk='1' and clk'event) then
      state<=nextstate; -- updating state
      if(load='1') then
        dx<="0000000000000000";
        dy<="0000000000000000";
        x<="1001101101110001"; -- x is a 16-bit register representing fractional values. It should be intialized to .607
        y<="0000000000000000"; -- y is a 16 bit register representing fractional values. It should be intialized to .607
        t1:=angle(8 downto 0); -- here we transforming the angles in first quadrant and calculating cos and sign values after performing according to quadrants the angles lie sign is assigned
        if(angle(8)='1') then -- it is sign bit in angle that is MSB in angle input
          t1:=not(t1)+'1';
        else
          t1:=t1;
        end if;
        in_angle:=t1(7 downto 0);
        cc<=conv_integer(t1(7 downto 0));
        if(cc>90) then
          in_angle(7 downto 0):="10110100"-in_angle(7 downto 0);
          a<='0' & in_angle( 7 downto 0) & "00000000";
        else
          a<='0' & in_angle( 7 downto 0) & "00000000";
        end if;
        negativesign<=angle(8);
        counter<=0;
      end if;
      if(shift='1') then
        if( counter=0) then
          dx<=x(15 downto 0); --when i=0 x is assigned to dx value
          dy<=y(15 downto 0); --when i=0 y is assigned to dy value
          da<=arctang(0);
        else
          dx<=mach(7 downto (8-counter)) & x(15 downto (counter)); --when i goes on upto 8 increasing right shift operation takes place in dx
          dy<=mach(7 downto (8-counter)) & y(15 downto (counter)); --when i goes on upto 8 increasing right shift operation takes place in dy
          da<=arctang(counter);-- i goes on incrementing the precalculated values are also assigned according to each cycle
        end if;
      end if;
      if(incr='1') then
        counter<=counter+1; -- it increments the counter
      end if;
      if(angpos='1') then -- it performs when angle is positive
        x<= x - dy;
        y<= y + dx;
        a<= a - da;
      end if;
      if(angneg='1') then -- it performs when angle is negative
        x<= x + dy;
        y<= y - dx;
        a<= a + da;
      end if;
      t<=conv_integer(t1(7 downto 0));
      if( done1 ='1') then
        if(angle(8)='1')then -- in this sign is assigned according to the angle lies in quadrant the sign bit in cos and sine value is assigned sin
          if(t>=0 and t <= 90) then
            cosine<='0' & x;
            sine<= '1' & y;
          elsif(t>90 and t <= 180) then
            cosine<='1' & x;
            sine<= '1' & y;
          end if;
        elsif(angle(8)='0')then
          if(t>=0 and t <= 90) then
            cosine<='0' & x;
            sine<= '0' & y;
          elsif(t>90 and t <= 180) then
            flag<='1';
            cosine<='1' & x;
            sine<= '0' & y;
          end if;
        end if;
      end if;
    end if;
end process; -- end of second process
end project; -- end of architecture name

la suite demain
JR

[MedYak]

je vous remercie pour votre temps et je suis vraiment désolé pour le manque des indentations.

[jiherve]

Bonjour,
en fait tu n'as pas deux valeurs car la première ne signifie rien, il manque un reset dans ton design tu aurais compris
voila la simulation :

il faut TOUJOURS un reset c'est une erreur éliminatoire.

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity cordic is
  port(clk, start,reset: in std_logic; -- clock signal and start signal
angle : in std_logic_vector(15 downto 0); --input angle
-- in angle vector MSB is sign bit and remaining bits are the angle value
cosine, sine : out std_logic_vector( 16 downto 0); -- outputs cos and sin values
-- in sine and cosine vector output the MSB in cos and sin vector is sign bit and remaining are values which are in fraction
done2 : out std_logic); --INDICATES COMPLETION AND GOT CORRECT VALUES
  end cordic; -- END OF THE ENTITY NAME
architecture project of cordic is --ARCHITECTURE NAME IS PROJECT
  signal load, shift, incr,angpos, angneg, posi, c8, negativesign, done1,flag: std_logic:='0';
-- REQUIRED SIGNALS
  signal state, nextstate : integer range 0 to 5; -- STATE AND NEXT STATE
  signal x,y,dx,dy : std_logic_vector( 15 downto 0); -- AFTER ALGORITHM COMPLETES X HOLDS COS(A), Y HOLDS SIN(A)
-- dx and dy which holds x/(2^i), y/(2^i) respectively
  signal a: std_logic_vector(16 downto 0); -- a which holds angle mentioned in question
  signal da: std_logic_vector(15 downto 0); -- which holds arctan(2^-i) values in this upper 8 bits whole number part and lower 8 bits fractional part
  signal counter: integer range 0 to 8; -- which counts number of cycles.
  signal t,cc:integer ;
  type atang is array (0 to 8) of std_logic_vector(15 downto 0); -- look up table which holds arctan(2^-i) where i ranging from 0 to 8
---- upper 8 bits whole number part, lower 8 bits fractional part
  constant arctang :atang :=("0010110100000000", -- 45 degrees
                             "0001101010010000", -- 26.6 degrees
                             "0000111000001001", -- 14.03 degrees
                             "0000011100100000", -- 7.12 degrees
                             "0000001110010011", -- 3.57 degrees
                             "0000000111001010", -- 1.78 degrees
                             "0000000011100101", -- 0.89 degrees
                             "0000000001110010", -- 0.44 degrees
                             "0000000000111001"); -- 0.22 degrees
  constant mach : std_logic_vector(7 downto 0):="00000000"; --It is used for right shift operation
begin
  c8  <='1' when counter=8 else '0'; -- After counter reaches 8 opeartion over and we get cos and sin values
  posi<='0' when (a(16)='1') else '1'; -- it is for if angle is positive or negative based on this
-- it simulates angpos and angneg
process(state,start,c8,posi,reset)
  begin
    shift<='0';load<='0'; incr<='0'; angpos<='0'; angneg<='0'; done1<='0';done2<='0';
    case state is -- actual process going in state diagram how the operation works when it changes from state to nextstate
      when 0 => 
        if(start='1') then 
          nextstate<=5; load<='1';
        else 
          nextstate <=0; 
        end if;
      when 1=> 
        if(c8='1') then 
          nextstate<=4; done1<='1'; -- if c8='1' end of operation
        else 
          nextstate<=2; shift<='1'; 
        end if;
      when 2=> 
        if(posi='1') then 
          nextstate <=3; angpos<='1'; -- if angle is positive it do angpos
        else nextstate <=3; 
          angneg<='1'; 
        end if; -- if angle is negative it do angneg
      when 3=> 
        nextstate<=1; incr<='1'; --increment the counter
      when 4=> 
        if(start='1') then 
          nextstate<=0; done2<='1'; --
        else 
          nextstate<=0; done2<='1'; 
        end if;
      when 5 =>
        if(start='1')then 
          nextstate<=1;load<='1';
        else 
          nextstate<=5 ;
        end if;
      when others =>
        nextstate <=0;
    end case;
  end process; --end of second process
process(clk)
  variable t1:std_logic_vector(8 downto 0):=(others=>'0');
  variable in_angle:std_logic_vector(7 downto 0):=(others=>'0');
  begin
    if reset = '0' then
        dx<=(others=>'0');
        dy<=(others=>'0');
        da<=(others=>'0');
        x<=(others=>'0'); 
        y<=(others=>'0');
        a<=(others=>'0');
        counter<=0;
        sine <=(others=>'0');
        cosine<=(others=>'0');
        t1:=(others=>'0');
        
        in_angle:=(others=>'0');
        negativesign <= '0';
        state <= 0;
    elsif(clk='1' and clk'event) then
      state<=nextstate; -- updating state
      if(load='1') then
        dx<="0000000000000000";
        dy<="0000000000000000";
        x<="1001101101110001"; -- x is a 16-bit register representing fractional values. It should be intialized to .607
        y<="0000000000000000"; -- y is a 16 bit register representing fractional values. It should be intialized to .607
        t1:=angle(8 downto 0); -- here we transforming the angles in first quadrant and calculating cos and sign values after performing according to quadrants the angles lie sign is assigned
        if(angle(8)='1') then -- it is sign bit in angle that is MSB in angle input
          t1:=not(t1)+'1';
        else
          t1:=t1;
        end if;
        in_angle:=t1(7 downto 0);
        cc<=conv_integer(t1(7 downto 0));
        if(cc>90) then
          in_angle(7 downto 0):="10110100"-in_angle(7 downto 0);
          a<='0' & in_angle( 7 downto 0) & "00000000";
        else
          a<='0' & in_angle( 7 downto 0) & "00000000";
        end if;
        negativesign<=angle(8);
        counter<=0;
      end if;
      if(shift='1') then
        if( counter=0) then
          dx<=x(15 downto 0); --when i=0 x is assigned to dx value
          dy<=y(15 downto 0); --when i=0 y is assigned to dy value
          da<=arctang(0);
        else
          dx<=mach(7 downto (8-counter)) & x(15 downto (counter)); --when i goes on upto 8 increasing right shift operation takes place in dx
          dy<=mach(7 downto (8-counter)) & y(15 downto (counter)); --when i goes on upto 8 increasing right shift operation takes place in dy
          da<=arctang(counter);-- i goes on incrementing the precalculated values are also assigned according to each cycle
        end if;
      end if;
      if(incr='1') then
        counter<=counter+1; -- it increments the counter
      end if;
      if(angpos='1') then -- it performs when angle is positive
        x<= x - dy;
        y<= y + dx;
        a<= a - da;
      end if;
      if(angneg='1') then -- it performs when angle is negative
        x<= x + dy;
        y<= y - dx;
        a<= a + da;
      end if;
      t<=conv_integer(t1(7 downto 0));
      if( done1 ='1') then
        if(angle(8)='1')then -- in this sign is assigned according to the angle lies in quadrant the sign bit in cos and sine value is assigned sin
          if(t>=0 and t <= 90) then
            cosine<='0' & x;
            sine<= '1' & y;
          elsif(t>90 and t <= 180) then
            cosine<='1' & x;
            sine<= '1' & y;
          end if;
        elsif(angle(8)='0')then
          if(t>=0 and t <= 90) then
            cosine<='0' & x;
            sine<= '0' & y;
          elsif(t>90 and t <= 180) then
            flag<='1';
            cosine<='1' & x;
            sine<= '0' & y;
          end if;
        end if;
      end if;
    end if;
end process; -- end of second process
end project; -- end of architecture name

je te laisse modifier le test bench c'est trivial, ceci dit je ne sais pas si ton truc calcule bien, en 8bits la convergence n'est pas top.
JR

[MedYak]

bonjour,

je vous remercie, pourriez-vous svp m'envoyer le testbench que vous avez utilisé.

concernant les résultats, le code donne des valeurs qui se rapprochent des valeurs réel de sin et cos lorsqu'il s'agit des valeurs positives mais pas le cas pour les valeurs négatives de sin et cos, j'ai essayé dans le code de réduire l'angle d'entrée au 1er quadrant puisque l'algorithme fonctionne pour des angles dans l'intervalle [-pi/2 , pi/2], mais le code donne toujours des valeurs négatives fausses.

avez-vous des idées ?

[jiherve]

bonsoir
le test bench c'est le tien mais avec un reset.
Le CORDIC ne fonctionne bien que dans le premier quadrant il faut donc ramener l'angle dans ce quadrant et se souvenir de l'opération.

LIBRARY ieee  ; 
LIBRARY std  ; 
USE ieee.std_logic_1164.all  ; 
USE ieee.std_logic_arith.all  ; 
USE ieee.std_logic_textio.all  ; 
USE ieee.STD_LOGIC_UNSIGNED.all  ; 
USE ieee.std_logic_unsigned.all  ; 
use ieee.numeric_std.all;
use ieee.math_real.all;
USE std.textio.all  ; 
ENTITY tb  IS 
END ; 
 
ARCHITECTURE tb_arch OF tb IS
  signal checker : integer ;
  SIGNAL done2   :  STD_LOGIC  ; 
  SIGNAL cosine   :  std_logic_vector (16 downto 0) :=(others => '0')  ; 
  SIGNAL start   :  STD_LOGIC  ; 
  SIGNAL clk   :  STD_LOGIC  :='0'; 
  SIGNAL sine   :  std_logic_vector (16 downto 0):=(others => '0')  ; 
  SIGNAL angle   :  std_logic_vector (15 downto 0);--:=("0000000000000000");
  signal reset :  STD_LOGIC; 
  COMPONENT cordic 
port(clk, start,reset: in std_logic; -- clock signal and start signal
angle : in std_logic_vector(15 downto 0); --input angle
-- in angle vector MSB is sign bit and remaining bits are the angle value
cosine, sine : out std_logic_vector( 16 downto 0); -- outputs cos and sin values
-- in sine and cosine vector output the MSB in cos and sin vector is sign bit and remaining are values which are in fraction
done2 : out std_logic); --INDICATES COMPLETION AND GOT CORRECT VALUES
       
  END COMPONENT ; 
BEGIN
  DUT  : cordic  
    PORT MAP ( 
      done2   => done2  ,
      cosine   => cosine  ,
      start   => start  ,
      clk   => clk  ,
      sine   => sine  ,
      angle   => angle,   
      reset => reset) ; 

-- Generation d'horloge 
    reset <= '0' , '1'  after  100 ns;
    start <= reset;
    

  --P_CLKGEN : process
  --begin
    clk <= not (clk) after 5 ns;
  --  wait for 2 ns;
    --clk <= '0';
    --wait for 2 ns;
  --end process;

  P_SIGGEN : process
  begin
  wait for 52 ns;
--angle <= "0000000001011010";
--wait for 100 ns;
--angle <= "0000000001111000";
--wait for 100 ns;
angle <= "1111111110001000";
wait for 52 ns;
--angle <= "1111111110110000";
--wait for 100 ns;
wait;

   
end process ;

END architecture;

JR

[MedYak]

Merci;

sur la simulation que vous avez fait, si vous divisez la valeur décimale de cos sur 2^16 vous obtiendrez -0.494 qui est proche de la valeur réelle -0.5, mais pour le sin la valeur est très loin de la valeur réelle.

pourriez-vous svp jeter un oeil sur le code si vous connaissez bien le principe de l'algorithme ?

[jiherve]

bonsoir,
demain ou après demain car je suis dans des travaux domestiques qui prennent beaucoup de temps.
JR

[MedYak]

Oui bien sûr,
Je vous remercie encore une fois.

[jiherve]

Bonjour,
une question quel est le codage des angles ?
JR

[MedYak]

Bonjour,

si j'ai bien compris la question, les angles sont en codage binaire normal, pas de virgule fixe.

[jiherve]

bonsoir,
donc 2*PI = 65535?
JR

[MedYak]

Bonsoir,

Je ne sais pas vraiment où vous avez trouvé ça.

L'algorithme calcul sin et cos des angles entre -pi et pi.
L'angle d'entrée est codé sur 16 bit avec un bit de signe et le reste représente la valeur de l'angle.

X,dx,y et dy sont représentés en virgule fixe, donc le résultat est en virgule fixe avec 16 bits pour la partie fractionnelle. Donc pour obtenir la valeur de cos et sin on doit diviser par 2^16.

[jiherve]

bonjour,
bon j'ai pigé le codage, ce n'est pas le plus courant c'est donc un codage en virgule fixe avec 8 bits de partie entière et 8 bits de partie fractionnaire.
par contre ni y aurait il pas une erreur la dedans:

       
 if(angle(8)='1')then -- in this sign is assigned according to the angle lies in quadrant the sign bit in cos and sine value is assigned sin
          if(t>=0 and t <= 90) then
            cosine<='0' & x;
            sine<= '1' & y;
          elsif(t>90 and t <= 180) then
            cosine<='1' & x;
            sine<= '1' & y;
          end if;
        elsif(angle(8)='0')then
          if(t>=0 and t <= 90) then
            cosine<='0' & x;
            sine<= '0' & y;
          elsif(t>90 and t <= 180) then
            flag<='1';
            cosine<='1' & x;
            sine<= '0' & y;
          end if;
        end if;

car chez moi un nombre négatif (hors codage flottant) ce n'est pas un bit de signe concaténé avec une valeur absolue.
et il y a des trucs olé olé:

        a<= a - da;

a est codé sur 17bits et da sur 16!!. çà passe mais c'est cochon

JR

[MedYak]

j'ai travaillé sur les relations entre les fonctions trigonométriques et sur l'emplacement de l'angle sur le cercle,
Avez-vous une idée pour corriger ça ?

car chez moi un nombre négatif (hors codage flottant) ce n'est pas un bit de signe concaténé avec une valeur absolue.
JR

[jiherve]

Re
si ce que tu attends ce sont des valeurs signées en complément à 2 et bien il faut appliquer la règle connue : -A= !A+1.
Ceci dit comme en tete tu effectues deja une reduction au premier quadrant tu devrais rajouter un signal dans lequel tu stockerais la valeur du quadrant originel,
et en sortie tu n'aurais plus qu'a faire un CASE, cela serait plus élégant.
Dernière chose méfie toi comme de la peste de l'overloading des packages, normalement on peut tout faire avec 3 librairies:

use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use IEEE.math_real.all;

par contre c'est plus verbeux.

JR